• ADK-9600 RF transceiver FMC subcard front view: large finned heatsink, gold SSMC connectors at the top and the FMC HPC connector at the bottom
  • ADK-9600 functional block diagram: Rx, Tx and ORx chains with ADC and DAC converters, JESD204B/JESD204C serial interface, LMK04828 clock chip and FMC HPC connector
  • ADK-9600 clock cascade distribution diagram: LMK04828 clock distribution in master and slave modes to the transceiver and the FPGA
  • ADK-9600 observation calibration feedback diagram: ORx1 to ORx4 IPEX inputs switched to the Tx1 to Tx4 SSMC output paths
  • ADK-9600 RF FMC subcard angled view: finned heatsink, SSMC connectors and the FMC HPC connector
1 5

ADRV9025A 4T4R Wideband RF Transceiver FMC Subcard ADK-9600

ADRV9025A 4T4R Wideband RF Transceiver FMC Subcard ADK-9600

$5,588.00 USD
$5,588.00 USD
Sale Sold out
Shipping calculated at checkout.

The ADK-9600 is a high-performance, wideband, multi-channel RF transceiver FMC module built around the ADRV9025A, providing a one-stop RF front-end solution for high-performance software-defined radio (SDR) platforms. It provides four transmitters (Tx), four receivers (Rx) and two observation receivers (ORx) behind a VITA 57.1 FMC standard interface, covering 75MHz to 6GHz. A TI LMK04828 clock chip supports variable sample rates and dynamic JESD204B/C rate configuration, with internal or external reference clock and external local oscillator inputs (LO1/LO2). FPGA reference code and JESD204B/JESD204C reference designs are provided. It is aimed at 5G base stations, radar systems, massive MIMO systems and high-end test instruments.

Overview

  • RF transceiver: ADRV9025A, 4 Tx + 4 Rx + 2 ORx
  • 75MHz to 6GHz full-band RF coverage
  • 200MHz per-channel Tx/Rx bandwidth, 450MHz combined (Tx/ORx) bandwidth
  • Clock: TI LMK04828, internal/external reference, external LO input, TX-to-ORx loopback calibration
  • TDD and FDD duplex modes
  • Compact size with on-board heatsink, total card power under 9W

Model Comparison

Model ADK-9600
RF Transceiver Chip Analog Devices ADRV9025A
Clock Management Chip Texas Instruments LMK04828
Operating Band 75MHz to 6GHz
Channel Configuration 4 Tx + 4 Rx + 2 ORx (each ORx supports dual input)
Tx Bandwidth 200MHz (single channel)
Rx Bandwidth 200MHz (single channel)
Combined Bandwidth 450MHz (Tx/ORx)
EVM ≤0.56% (5G NR @ 100MHz)
ACLR < -64dB
Tx Gain Step 0.05dB
Rx Gain Step 0.5dB
Tx Gain Control Range 32dB
Rx Gain Control Range 30dB
Max. ADC Sample Rate 245.76 MS/s
Max. DAC Sample Rate 491.52 MS/s
RF Connector SSMC
Tx Output Power +5 dBm (@ 1.5GHz, CW)
Rx Sensitivity -90 dBm (@ 20MHz bandwidth)
Rx EVM < 2%
Rx Noise Figure 11.9dB (@ 2.6GHz)
Rx Wideband SFDR 60 dBc (ADC)
Board Standard VITA 57.1 FMC HPC
Supply Voltage +12V, +3.3V
IO Bank Voltage VADJ = 1.8V
Typical Power Consumption < 9W
Dimensions 69.0 mm x 82.6mm

What's in the Box

  • FMC subcard x 1

Warranty

12-month warranty on the main unit. FPGA chips and LCD screens are wear items and are not covered; accessories and gifts are not covered.

View full details
Variant Variant total Quantity Price Variant total
ADK-9600ADK-9600
ADK-9600ADK-9600
$5,588.00/ea		 $0.00
$5,588.00/ea $0.00